1. Field of the Invention
The present invention relates to a characteristic evaluation method for insulated gate type transistors which extracts their effective channel widths, a characteristic evaluation apparatus for insulated gate type transistors, a method of manufacturing insulated gate type transistors by using the above characteristic evaluation method, and a computer readable storing medium storing a characteristic evaluation program.
2. Description of the Background Art
An electrically effective channel width, i.e., an effective channel width Weff, can be determined from the drain currents of two or more insulated gate type transistors having the same channel length and a different channel width. This method is generally called “drain current method.” The drain current method can directly determine the difference between an effective channel width Weff and a mask channel width Wm, namely, a channel narrowing DW (=Wm−Weff).
As a drain current method, a wide variety of methods have been proposed heretofore. They are described, for example, in “A New Method to Electrically determine Effective MOSFET Channel Width” by Y. R. Ma and K. In Wang, IEEE Trans. Elect. Dev., ED-29, p. 1825, 1982; “A New Method to Determine the MOSFET Effective Channel Width” by N. D. Arora, L A. Blair and L. M. Richardson, IEEE Trans. Elect. Dev., ED-37(3), p. 811, 1990; “A Method to Extract Gate-Bias-Dependent MOSFET's Effective Channel Width” by Y. T. Chia and G. J. Hu, IEEE Trans. Elect. Dev., ED-38(2), p. 424, 1991; and “A Direct Method to Extract Effective Geometries and Series Resistances of MOS Transistors” by P. R. Karlsson and K O. Jeppson, Proc. IEEE ICMTS, vol. 7, p. 184, 1994.
Of various drain current methods, the Chia method is commonly often used. Thus, the Chia method will be briefly described here. The total source-drain resistance R is given by the sum of a channel resistance Rch and an external resistance Rsd. Now, supposing the following Equation 1 as the equation to express drain current.
                              I          ds                =                                            β              0                        ·                          (                                                V                  gs                                -                                  V                  th                                -                                                      V                    ds                                                        2                                            )                        ·                          V              ds                                                          1            +                          θ1              ·                              (                                                      V                    gs                                                        -                                      V                    th                                                  )                                      +                          θ              ⁢                                                          ⁢                              2                ·                                                      (                                                                  V                        gs                                                                    -                                              V                        th                                                              )                                    2                                                                                        (                  Eq          .                                          ⁢          1                )            where β0, Vds* and Vgs* are given by the following Equations 2, 3 and 4, respectively, and θ1 and θ2 are the invariables.
                              β          0                =                                            μ              0                        ⁢                          C              ox                        ⁢                          W              eff                                            L            eff                                              (                  Eq          .                                          ⁢          2                )            where μ0 is a carrier mobility, Leff is an effective channel length, Weff is an effective channel width, and Cox is a gate insulating film capacity.Vds* =Vds−Ids·Rsd  (Eq. 3)
                              V          gs                          =                              V            gs                    -                                                    I                ds                            ·                              R                sd                                      2                                              (                  Eq          .                                          ⁢          4                )            
Neglecting the term of θ2, Equation 5 is obtained from Equations 1, 3 and 4. Supposing an external resistance Rsd is inversely proportional to an effective channel width Weff, a channel narrowing DW can be extracted through the following procedure.
                              I          ds                =                                            β              0                        ·                          (                                                V                  gs                                -                                  V                  th                                -                                                      V                    ds                                                        2                                            )                        ·                          V              ds                                                          1            +                                          (                                  θ1                  +                                                            β                      0                                        ·                                          R                      sd                                                                      )                            ·                              (                                                      V                    gs                                    -                                      V                    th                                                  )                                                                        (                  Eq          .                                          ⁢          5                )            where the difference between a gate voltage and a threshold voltage, (Vgs−Vth), is defined as a gate overdrive Vgs.
Step 1: Against a certain gate overdrive Vgt, Ids−Wm characteristic is plotted in an X-Y plane whose X-axis is mask channel Wm and Y-axis is drain current Ids, and a linear fitting is made. At that time, the intersection with the X-axis in the X-Y plane which is obtained by extrapolating each straight line is the channel narrowing DW (Vgt) in the gate overdrive Vgt (see FIG. 1).
Step 2: By repeating step 1 while changing the gate overdrive Vgt, it can be seen how the channel narrowing DW (Vgt) depends on the gate overdrive Vgt (see FIG. 1).
Prior art characteristic evaluation method for insulated type transistors is constructed as described. In Chia method, for example, it is necessary to know the threshold voltage of a transistor for use in extraction. The threshold voltage of a transistor is found by, for example, extrapolation from the characteristic between gate voltage and source-drain current, as shown in FIG. 2. Therefore, the error due to the uncertainty of a threshold voltage is further pronounced with reducing transistor size.